The present invention relates to a method for manufacturing a semiconductor device, and is preferably applicable to, for example, a method for manufacturing a semiconductor device including a semiconductor element formed in a semiconductor substrate therein.
A semiconductor device has been widely used which has a memory cell region where a memory cell such as a nonvolatile memory is formed over a semiconductor substrate, and a peripheral circuit region where a peripheral circuit including, for example, a MISFET (Metal Insulator Semiconductor Field Effect Transistor) is formed over the semiconductor substrate.
For example, as a nonvolatile memory, there may be formed a memory cell formed of a split gate type cell using a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor) film. In this case, the memory cell is formed of two MISFETs of a control transistor having a control gate electrode, and a memory transistor having a memory gate electrode. Whereas, the gate insulation film of the memory transistor is formed of a lamination film including, for example, a silicon oxide film, a silicon nitride film, and a silicon oxide film, and called an ONO (Oxide Nitride Oxide) film.
Japanese Unexamined Patent Application Publication NO. 2004-200504 (Patent Document 1) discloses the following technology: in a semiconductor integrated circuit device, a memory cell is formed in a memory cell formation region at a main surface of a substrate, and a low breakdown voltage p type MISFET is formed in a low voltage p MIS (Metal Insulator Semiconductor) formation region at the main surface of the substrate.